Volume 6, Number 1, March 2006 (ISSN 1598-1657)
			Editorial ·································································································································· Byung-Gook Park		i
			NANOCAD Framework for Simulation of Quantum Effects in Nanoscale MOSFET Devices ···················· ·········· Seonghoon Jin, Chan Hyeong Park, In-Young Chung, Young June Park, and Hong Shick Min		1
			Schottky Barrier MOSFETs with High Current Drivability for Nano-regime Applications ························· ········································· Moongyu Jang, Yarkyeon Kim, Myungsim Jun, Cheljong Choi, Taeyoub Kim, ·················································································································· Byoungchul Park, and Seongjae Lee		10
			Fabrication of p-type FinFETs with a 20 nm Gate Length using Boron Solid Phase Diffusion Process ··· ····························································································································································· Won-Ju Cho		16
			Highly Manufacturable 65nm McFET (Multi-channel Field Effect Transistor) SRAM Cell with Extremely High Performance ·································································································································· ················································· Sung Min Kim, Eun Jung Yoon, Min Sang Kim, Ming Li, Chang Woo Oh, ····················································· Sung Young Lee, Kyoung Hwan Yeo, Sung Hwan Kim, Dong Uk Choe, ······················································································· Sung Dae Suk, Dong-Won Kim, and Donggun Park		22
			Partially-insulated MOSFET (PiFET) and Its Application to DRAM Cell Transistor ··································· ···························· Chang Woo Oh, Sung Hwan Kim, Kyoung Hwan Yeo, Sung Min Kim, Min Sang Kim, ·················································································Jeong-Dong Choe, Dong-Won Kim, and Donggun Park		30
			1/f Noise Characteristics of Sub-100 nm MOS Transistors ·············································································· ····································· Jeong-Hyun Lee, Sang-Yun Kim, Ilhyun Cho, Sungbo Hwang, and Jong-Ho Lee		38
			Characterization and Design Consideration of 80-nm Self-Aligned N-/P-Channel I-MOS Devices ··········· ··············································································· Woo Young Choi, Jong Duk Lee, and Byung-Gook Park		43
			Single-Electron Logic Cells and SET/FET Hybrid Integrated Circuits ···························································· ······················································ S.J. Kim, C.K. Lee, J.U. Lee, S.J. Choi, J.H. Hwang, S.E. Lee, J.B. Choi, ···································································································· K.S. Park, W.H. Lee, I.B. Paik, and J.S. Kang		52
			Call Papers on Sep. 2006 Special Issue on Compound Semiconductors for Industrial Applications ········		59
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